Current mirrors are well known, and prior art current mirror designs have been implemented both in bipolar and MOS circuit technology. FIG. 1 illustrates an example of a typical prior art P channel MOS current mirror. Ideally, the function of current mirror 10 is to match channel current I.sub.O through transistor M.sub.2, to channel current I.sub.R through transistor M.sub.1, in order that current I.sub.O "mirrors" current I.sub.R. In current mirror 10, diode-connected MOS transistor M.sub.1 is in saturation, since V.sub.DS1 .gtoreq.V.sub.GS1. With the gate of transistor M.sub.2 connected to the gate of transistor M.sub.1, and the sources of transistors M.sub.1 and M.sub.2 connected, the gate-to-source voltages of transistors M.sub.1 and M.sub.2 are equal (V.sub.GS2 =V.sub.GS1). Therefore transistor M.sub.2 also operates in saturation with channel current I.sub.O through transistor M.sub.2 equal to channel current I.sub.R through transistor M.sub.1. This is true for devices operating both above threshold (V.sub.GS .gtoreq.V.sub.T) and in the subthreshold region (V.sub.GS&lt;V.sub.T). For devices operating above threshold, current I.sub.R through transistor M.sub.1 is expressed as: ##EQU1## and current I.sub.O is expressed as ##EQU2## where V.sub.A is due to channel modulation (Early Voltage).
Transistors on the same integrated circuit are fabricated simultaneously and thus transistors M.sub.1 and M.sub.2 have essentially identical process parameters V.sub.TH, u.sub.o, C.sub.ox, etc. Moreover, with V.sub.GS2 =V.sub.GS1 due to the circuit connection shown in FIG. 1, the current matching ratio of I.sub.O to I.sub.R may be expressed in simplified terms as ##EQU3## where W.sub.1 =channel width of transistor M.sub.1 ;
W.sub.2 =channel width of transistor M.sub.2 ; PA1 L.sub.1 =channel length of transistor M.sub.1 ; and PA1 L.sub.2 =channel length of transistor M.sub.2.
Thus, the task of selecting a desired I.sub.O /I.sub.R current ratio is simplified to selecting transistor geometry in accordance with Equation (3). Typically, L.sub.1 =L.sub.2 in order to avoid matching problems, and thus ##EQU4## However, factors such as channel length modulation; ##EQU5## threshold voltage mismatch between transistors M.sub.1 and M.sub.2, and imperfect matching of transistor geometry also result in deviation from the ideal current ratio I.sub.O /I.sub.R.
The higher the output resistance Ro of a current source, the more perfect it is. Output resistance is proportional to channel length. Ideally R.sub.o =.infin., in that the output current will remain constant for varying output voltages. I.sub.O may also fluctuate due to the fact that V.sub.DS (M.sub.1) need not necessarily equal V.sub.DS (M.sub.2). Thus, the modulation of drain current as the drain voltage varies causes a variation of I.sub.O : ##EQU6##
FIG. 2 shows a prior art P channel current mirror commonly known as the "Wilson current mirror." Utilizing negative feedback, Wilson current mirror 20 provides an increased output resistance as compared with current mirror 10 of FIG. 1. In FIG. 2, the sources of transistors M.sub.1 and M.sub.2 are connected together to positive supply voltage V+, and the gates of transistors M.sub.1 and M.sub.2 are connected together. Therefore, the source-gate voltage of transistors M.sub.1 and M.sub.2 are equal. The gate and drain of transistor M.sub.2 are connected together, forcing transistor M.sub.2 into saturation. Transistor M.sub.1 therefore mirrors the current flow through transistor M.sub.2 or, since I.sub.R is made to flow through transistor M.sub.1, current I.sub.O flowing through the channel of transistor M.sub.2 equals I.sub.R. Transistor M.sub.4 isolates the drain of transistor M.sub.2 from the voltage applied to the drain of transistor M.sub.4, thereby preventing any variation in M.sub.4 drain voltage from affecting current I.sub.O. Also, transistor M.sub.4 provides negative feedback to current mirror 20, thereby providing a high output resistance.
FIG. 3 shows a prior art improved Wilson current mirror 30. Current mirror 30 operates similarly to current mirror 20 of FIG. 2, and the addition of transistor M.sub.3 matches V.sub.DS1 to V.sub.DS2. This provides an improvement as compared with the Wilson current mirror of FIG. 2 in that the Wilson current mirror 20 allows V.sub.DS1 to be different than V.sub.DS2, providing another source of error.
FIG. 4 shows another well known current mirror commonly known as a cascode current mirror. Cascode current mirror 40 minimizes variations in I.sub.O /I.sub.R due to output resistance R.sub.O. Cascode current mirror 40 is, in effect, a cascade series of 2 current mirror 10 of FIG. 1. In the configuration shown in FIG. 4, assuming all operational parameters of transistors M.sub.1 through M.sub.4 are identical, i.e. the threshold voltages of the devices are identical and L.sub.1 =L.sub.2 ; L.sub.3 =L.sub.4 ; W.sub.2 /W.sub.1 =W.sub.4 /W.sub.3, drain voltage V.sub.D1 of transistor M.sub.1 equals drain voltage V.sub.D2 of transistor M.sub.2. If there is a voltage fluctuation increasing the drain voltage of transistor M.sub.4, drain current I.sub.O through transistors M.sub.2 and M.sub.4 remains relatively constant. Current ratio I.sub.O /I.sub.R is thus maintained. Table 1 shows the minimum saturation voltage (V.sub.satmin) of each of the current mirrors of FIGS. 1-4. The current mirror of FIG. 1, being the simplest, has the lowest V.sub.satmin equal to simply dV.sub.2, where dV=(V.sub.GS1 -V.sub.T1), and dV is the overdrive voltage above the threshold voltage V.sub.T. All of the remaining current mirror of FIGS. 2-4, being more complex, result in greater V.sub.satmin, a distinct disadvantage. However, this is the tradeoff for achieving a high output impedance as provided in the current mirrors of FIGS. 2-4.
FIGS. 5-10 depict additional prior art current mirrors which attempt to achieve high output resistances and a relatively low V.sub.satmin, although necessarily resulting in a V.sub.satmin greater than the V.sub.satmin of current mirror 10 of FIG. 1. Furthermore, the prior art current mirrors of FIGS. 5-10 require an additional reference current or are unduly affected by process variations and changes in operating temperature. Therefore, it is desirable to provide a more efficient current source circuit which provides high output impedance, low saturation voltage, and which is unaffected by process variations and changes in temperature.